1. Technical Field
The embodiments herein generally relate to Ion-Selective Field-Effect Transistors (ISFET) and particularly relate to highly sensitivity nano-porous ISFET devices. The embodiments herein more particularly relate to a fabrication of a high Ph sensitive ISFETs and a method for fabricating a gate region of the ISFET with a nano porous layer.
2. Description of the Related Art
Ion selective field effect transistors (ISFET) are microelectronic products that have an important role in the development of chemical sensors. ISFET is analogous to MOSFET transistors where the metallic gate is replaced by a sensitive membrane and a reference electrode. The silicon dioxide surface contains reactive SiOH groups that can be used for covalent attachment of organic molecules and polymers. The various characteristics of the ISFET such as rapid response, low sample volumes and capabilities of on-chip circuit integration make the ISFET desirable for biosensor applications.
Currently the Ion selective field effect transistors (ISFET) are widely used as pH meters. The pH sensitivity of ISFETs is varied with respect to a transistor threshold voltage and is limited to values around 59 mv/pH according to Nernstian behaviour. The adsorbed charge layer on the sensitive membrane causes a shift in the threshold voltage due to the Nernst law.
In the existing techniques, the maximum achievable sensitivity of 59 mV/pH is relatively small when biological detection with ultra low concentration is required. Currently the low sensitivity problem is overcome by creating a porous layer on gate surface. The porous layer formed on the gate surface changes the electrical properties such as the electrical resistance or impedance.
Further, in the existing techniques, the porous structures are used for capacitance based devices and they show low sensitivity. In addition to the above, the porous sensors are not transistors. So there is no sign of amplification for such devices.
Hence there is a need to provide a method for fabricating ISFET through a formation of nano-porous structures of poly silicon films at active regions such as gate regions to realize high sensitivity pH transistors. There also exists a need to provide a method to integrate a nano-porous layer with active electronic components such as transistors.
The abovementioned shortcomings, disadvantages and problems are addressed herein and which will be understood by reading and studying the following specification.